Revision history of "intel/atom x5/x5-z8350"

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(cur | prev) 02:44, 19 August 2023‎ 24.130.12.145 (talk)‎ . . (4,934 bytes) (+1)‎ . . (Fix typo introduce > introduced) (undo)
(cur | prev) 23:48, 12 October 2021‎ 84.55.122.228 (talk)‎ . . (4,933 bytes) (+750)‎ . . (added SSE4.1, SSE4.2 & VT-x (as shown by CPU-Z)) (undo)
(cur | prev) 09:22, 5 January 2020‎ 104.207.129.72 (talk)‎ . . (4,183 bytes) (0)‎ . . (OpenGL Version 4.3 -> 4.4) (undo)
(cur | prev) 07:53, 28 January 2019‎ 89.230.215.92 (talk)‎ . . (4,183 bytes) (+5)‎ . . (undo)
(cur | prev) 21:32, 4 August 2018‎ David (talk | contribs)‎ m . . (4,178 bytes) (0)‎ . . (Reverted edits by 93.217.245.98 (talk) to last revision by ChippyBot) (undo)
(cur | prev) 19:50, 4 August 2018‎ 93.217.245.98 (talk)‎ . . (4,178 bytes) (0)‎ . . (undo)
(cur | prev) 19:48, 4 August 2018‎ 93.217.245.98 (talk)‎ . . (4,178 bytes) (0)‎ . . (undo)
(cur | prev) 19:48, 4 August 2018‎ 93.217.245.98 (talk)‎ . . (4,178 bytes) (0)‎ . . (undo)
(cur | prev) 15:15, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (4,178 bytes) (+1)‎ . . (Bot: moving all {{mpu}} to {{chip}}) (undo)
(cur | prev) 14:53, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (4,177 bytes) (-4)‎ . . (Bot: Replacing old {{mpu expansions}} template with {{expansions}}) (undo)
(cur | prev) 14:45, 13 December 2017‎ ChippyBot (talk | contribs)‎ m . . (4,181 bytes) (0)‎ . . (Bot: replacing deprecated (and now obselete) {{mpu features}} with {{x86 features}}) (undo)
(cur | prev) 06:26, 23 July 2017‎ 81.26.242.118 (talk)‎ . . (4,181 bytes) (-940)‎ . . (undo)
(cur | prev) 21:10, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (5,121 bytes) (-27)‎ . . (Bot: Automated text replacement (-\| electrical += Yes +)) (undo)
(cur | prev) 02:29, 23 June 2017‎ ChippyBot (talk | contribs)‎ m . . (5,148 bytes) (+2)‎ . . (Bot: corrected mem) (undo)
(cur | prev) 17:22, 4 November 2016‎ At32Hz (talk | contribs)‎ . . (5,146 bytes) (+30)‎ . . (undo)
(cur | prev) 22:29, 20 September 2016‎ ChipIt (talk | contribs)‎ . . (5,116 bytes) (+7)‎ . . (→‎Cache) (undo)
(cur | prev) 00:41, 19 September 2016‎ ChipIt (talk | contribs)‎ . . (5,109 bytes) (+1)‎ . . (undo)
(cur | prev) 09:39, 10 April 2016‎ At32Hz (talk | contribs)‎ m . . (5,108 bytes) (+73)‎ . . (→‎Cache) (undo)
(cur | prev) 14:51, 2 April 2016‎ At32Hz (talk | contribs)‎ . . (5,035 bytes) (+5)‎ . . (→‎Memory controller) (undo)
(cur | prev) 12:17, 2 April 2016‎ At32Hz (talk | contribs)‎ m . . (5,030 bytes) (0)‎ . . (→‎Graphics) (undo)
(cur | prev) 11:56, 2 April 2016‎ At32Hz (talk | contribs)‎ m . . (5,030 bytes) (+28)‎ . . (undo)
(cur | prev) 11:47, 2 April 2016‎ At32Hz (talk | contribs)‎ . . (5,002 bytes) (+5,002)‎ . . (Created page with "{{intel title|Atom x5-Z8350}} {{mpu | name = Intel Atom x5-Z8350 | no image = Yes | image = | image size = | caption...")

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	Atom x5-Z8350 - Intel#io +
base frequency	1,440 MHz (1.44 GHz, 1,440,000 kHz) +
core count	4 +
core name	Cherry Trail +
core stepping	D1 +
cpuid	0x000406C4 +
designer	Intel +
family	Atom x5 +
first announced	February 8, 2016 +
first launched	February 8, 2016 +
full page name	intel/atom x5/x5-z8350 +
has feature	integrated gpu +, Advanced Encryption Standard Instruction Set Extension +, Burst Performance Technology +, Enhanced SpeedStep Technology +, Intel VT-x +, SD Card support +, SDIO support +, eMMC support + and Low Power Engine +
has intel burst performance technology	true +
has intel enhanced speedstep technology	true +
has intel vt-x technology	true +
has locked clock multiplier	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
integrated gpu	HD Graphics (Cherry Trail) +
integrated gpu base frequency	200 MHz (0.2 GHz, 200,000 KHz) +
integrated gpu max frequency	500 MHz (0.5 GHz, 500,000 KHz) +
integrated gpu max memory	2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB) +
l1d$ description	6-way set associative +
l1d$ size	96 KiB (98,304 B, 0.0938 MiB) +
l1i$ description	8-way set associative +
l1i$ size	128 KiB (131,072 B, 0.125 MiB) +
l2$ description	16-way set associative +
l2$ size	2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description	No L3$ +
l3$ size	0 MiB (0 KiB, 0 B, 0 GiB) +
ldate	February 8, 2016 +
manufacturer	Intel +
market segment	Mobile +
max cpu count	1 +
max memory	2,048 MiB (2,097,152 KiB, 2,147,483,648 B, 2 GiB, 0.00195 TiB) +
max operating temperature	90 °C +
max pcie lanes	1 +
microarchitecture	Airmont +
min operating temperature	0 °C +
model number	x5-Z8350 +
name	Intel Atom x5-Z8350 +
part number	FJ8066401836620 +
platform	Cherry Trail +
process	14 nm (0.014 μm, 1.4e-5 mm) +
s-spec	SR2KT +
s-spec (qs)	QK1H +
sdp	2 W (2,000 mW, 0.00268 hp, 0.002 kW) +
series	Z8000 +
smp max ways	1 +
technology	CMOS +
thread count	4 +
turbo frequency (1 core)	1,920 MHz (1.92 GHz, 1,920,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +

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