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Display titleSophon BM1880 - Bitmain
Default sort keySophon BM1880, Bitmain
Page length (in bytes)1,839
Page ID32274
Page content languageEnglish (en)
Page content modelwikitext
Indexing by robotsAllowed
Number of redirects to this page4
Counted as a content pageYes
Number of subpages of this page0 (0 redirects; 0 non-redirects)

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Page creatorDavid (talk | contribs)
Date of page creation11:55, 25 December 2018
Latest editorDavid (talk | contribs)
Date of latest edit12:19, 25 December 2018
Total number of edits4
Total number of distinct authors1
Recent number of edits (within past 90 days)0
Recent number of distinct authors0

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Retrieved from "https://en.wikichip.org/wiki/bitmain/sophon/bm1880"
Facts about "Sophon BM1880 - Bitmain"
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core nameCortex-A53 + and RISC-V +
core voltage0.9 V (9 dV, 90 cV, 900 mV) +
designerBitmain +
familySophon +
first announcedOctober 17, 2018 +
first launchedOctober 17, 2018 +
full page namebitmain/sophon/bm1880 +
has ecc memory supportfalse +
instance ofmicroprocessor +
io voltage1.8 V (18 dV, 180 cV, 1,800 mV) + and 3.3 V (33 dV, 330 cV, 3,300 mV) +
isaRV32I + and ARMv8 +
isa familyRISC-V + and ARM +
ldate3000 +
manufacturerTSMC +
market segmentEdge Compute +
max memory4,096 MiB (4,194,304 KiB, 4,294,967,296 B, 4 GiB, 0.00391 TiB) +
max memory bandwidth11.92 GiB/s (12,206.08 MiB/s, 12.799 GB/s, 12,799.003 MB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels2 +
microarchitectureCortex-A53 + and RISC-V +
model numberBM1880 +
nameSophon BM1880 +
peak integer ops (8-bit)2,000,000,000,000 OPS (2,000,000,000 KOPS, 2,000,000 MOPS, 2,000 GOPS, 2 TOPS, 0.002 POPS, 2.0e-6 EOPS, 2.0e-9 ZOPS) +
supported memory typeDDR4-3200 +
tdp (typical)2.5 W (2,500 mW, 0.00335 hp, 0.0025 kW) +
technologyCMOS +